Over the last few decades, the semiconductor industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices, and the most common semiconductor technology presently used is silicon-based. A large variety of semiconductor devices have been manufactured having various applications in numerous disciplines. One silicon-based semiconductor device is a metal-oxide-semiconductor (MOS) transistor. The MOS transistor is one of the basic building blocks of most modern electronic circuits. Importantly, these electronic circuits realize improved performance and lower costs, as the performance of the MOS transistor is increased and as manufacturing costs are reduced.
A typical MOS semiconductor device includes a semiconductor substrate on which a gate electrode is disposed. The gate electrode, which acts as a conductor, receives an input signal to control operation of the device. Source and drain regions are typically formed in regions of the substrate adjacent the gate electrodes by doping the regions with a dopant of a desired conductivity. The conductivity of the doped region depends on the type of impurity used to dope the region. The typical MOS transistor is symmetrical, in that the source and drain are interchangeable. Whether a region acts as a source or drain typically depends on the respective applied voltages and the type of device being made. The collective term source/drain region is used herein to generally describe an active region used for the formation of either a source or drain.
MOS devices typically fall in one of two groups depending on the type of dopants used to form the source, drain and channel regions. The two groups are often referred to as n-channel and p-channel devices. The type of channel is identified based on the conductivity type of the channel which is developed under the transverse electric field. In an n-channel MOS (NMOS) device, for example, the conductivity of the channel under a transverse electric field is of the conductivity type associated with n-type impurities (e.g., arsenic or phosphorous). Conversely, the channel of a p-channel MOS (PMOS) device under the transverse electric field is associated with p-type impurities (e.g., boron).
A type of device, commonly referred to as a MOS field-effect-transistor (MOSFET), includes a channel region formed in the semiconductor substrate beneath the gate area or electrode and between the source and drain regions. The channel is typically lightly doped with a dopant having a conductivity type opposite to that of the source/drain regions. The gate electrode is generally separated from the substrate by an insulating layer, typically an oxide layer such as SiO2. The insulating layer is provided to prevent current from flowing between the gate electrode and the source, drain or channel regions. In operation, a voltage is typically developed between the source and drain terminals. When an input voltage is applied to the gate electrode, a transverse electric field is set up in the channel region. By varying the transverse electric field, it is possible to modulate the conductance of the channel region between the source and drain regions. In this manner an electric field is used to control the current flow through the channel region.
A widely-used semiconductor device is a floating gate memory. A floating gate memory has a floating gate positioned between a control gate and a channel. Information is stored within the memory device through (thousands) of stored charges on the floating gate. The information stored in a floating gate memory device can be determined because differing amounts of charge on the floating gate will shift the threshold voltage of the transistor. Zero excess charge on the floating gate produces a relatively low threshold voltage, which can be used to represent a stored logic 0, and stored charges on the floating gate produces a relatively high threshold voltage, which can be used to represent a stored logic 1.
A recent development has been to replace the conventional floating gate in a floating gate memory device with a single-electron device utilizing a phenomena known as Coulomb Blockade. The single-electron device can be thought of as a series of small capacitors (also known as quantum dots/granular regions/nanocrystals) that each store a single electron. The Coulomb Blockade effect occurs when the tunneling of an electron into a region prevents further tunneling of other electrons into the same region. If each region/capacitor is sufficiently small, the charging energy of the capacitor becomes so large that it is energetically unfavorable for two or more electrons to be located in a single region.
For a capacitor of capacitance C, the energy that needs to be imparted to a single electron to force the electron into the capacitor/region is the charging energy EC of a single electron, which is given by EC=e2/2C, where e is the charge on the electron. To achieve a Coulomb Blockade effect to prevent an electron from entering into one region after one electron has already been stored in the region, the charging energy is required to be greater than a thermal fluctuation energy kT, where k is the Stefan Boltzmann constant and T is the temperature. Assuming that there is no voltage increase applied externally when the temperature remains constant, the Coulomb Blockade effect is achieved by satisfying the condition of e2/(4π∈iD)>kT, where D is the size of the region.
An advantage of a single electron structure is that the number of electrons stored by the individual regions in the single electron structure can be precisely controlled. Furthermore, the number of electrons stored is significantly reduced when compared to conventional floating gates. Thus, the current used for writing can be reduced, which advantageously reduces the consumption of power by the device.
A problem associated with single electron devices is controlling the formation of the individual nanocrystals or capacitive regions. Current processing techniques, which involve thermal annealing amorphous silicon to obtain the nanocrystals, have difficulty in achieving small sized nanocrystals (less than about 40 angstroms). However, the ability to achieve smaller size of the nanocrystals is desirable, as smaller sized nanocrystals can achieve Coulomb Blocking at higher operating temperatures. Furthermore, a smaller sized nanocrystal retains its charge longer than a larger nanocrystal. Accordingly, a need exists for an improved process that allows for a greater flexibility in forming single-electron devices.